If you want to play with RISC-V hardware right now, I highly recommend taking a look at the Sipeed MAIX [1]. It has a bunch of neat features along with a dedicated RISC-V processor, for a considerably lower price (~$35 if my memory is correct). I've received a M1w, which is working quite well. The campaign has ended but it seems you can get the hardware on external retailers, however I cannot vouch for these [2]. They also have a Telegram chat where the developers of the product talk quite a bit, and if you ever have any questions they're quite responsive and helpful.
I just got my hands on one of these through the indiegogo campaign. Really cool! I just got micropython running, going to sit down with it this weekend
I want to get back to porting Chromium, because when AMD tries the second time around [0] (edit: maybe third time around, as wmf below points out) to do a pin-compatible RISC (maybe this time it's one of the Zen 4 platforms or whatever), I want to pop the phattest GPU in that thing and enjoy.
Actually it would be fourth time around, as the K7 Athlons/Thunderbirds were electrically compatible with Alpha 21264, although OK, it was not pin nor mechanically compatible as Alpha CPUs need additional directly attached serial (EE)PROM with boot PALcode/microcode/firmware/initial contents of L2 cache. On the other hand on typical lowend Alpha systems this PROM contained complete enought i386 emulator that it could run PC-style BIOS as part of hardware initialization (ie. work with ISA/PCI cards with x86 code in PROMs), somewhat ugly and scary is the fact that large part of the firmware variant needed for booting Windows NT was actually i386 code running in said emulator. (And then there is Linux, which in the somewhat Tour de force way does not care about the underlying PALcode API)
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) Alpha is to a large extent the ultimate RISC architecture that on the user side does not have any implicit sideefects of instructions and syscalls and interrupts work by simply exchanging two register sets. The idea is that there is PALcode which is the only privileged code running on the CPU, which then keeps track of whether whatever is currently running in userspace is user or kernel code and passes messages between these, to some extent it is microkernel as part of the CPU, which you additionally can as an OS modify (in reality you could not, because the PALcode is amalgamation of both the OS semantics, quirks of the actual CPU implementation and the actual motherboard in given system)
RISC-V is very VERY close to Alpha in this respect. There are no flags, everything is communicated via registers (which makes semantics clean and dynamic scheduling cheaper), and the equivalent of PALcode exist (called platform specific SBI calls, executing in M-mode).
IMhO, RISC-V is slightly better than Alpha on a many fronts:
the conditional branches which compares two registers would take two instructions on Alpha (on the critical path), RISC-V code density is better with compressed, the encoding is slightly cheaper for hardware, it ISA is more forward-looking/extensible, oh and it's open of course. The only thing I miss are the POPC/CTZ/CLZ instructions, but the B set will include them for implementations that have it.
Also, RISC-V hasn't been bought, litigated, and buried. Alpha is great, but we're about as likely to get new implementations of it at this point as we are of the 6809 or v20.
RISC-V's future is looking better and better. Who knows? Maybe TSMC or Samsung or one of the smaller fabs puts out a multicore version on a fairly modern process node and gets a multi-player motherboard market built in Taipei, Seoul, and Shenzen. It could be a player in laptops, desktops, tablets, and mobile rather than just embedded and SBCs. It could even be done without a premium going to Intel, AMD, ARM, nVidia, TI, Freescale, or IBM. The possibilities are exciting, because every time I hear about this ISA and its implementations it's better news.
IIRC it is slightly more complex: the Tru64 callPAL API is the common subset of all the three variants (VMS/Tru64/NT), but the NT/AlphaBIOS has slightly incompatible ABI which Linux can detect and work around. And also IIRC original Linux port to Alpha expected the NT PALcode, which makes sense given the fact that DEC sold systems that didn't have SRM in PROM (ie. Multia and a-series PWS) and thus only supported NT or Linux.
Back in the 1990's when the AMD Athlon first came out Slot 1 was supposed to share the bus with the DEC Alpha. The idea was you replace the bios and you could use the same motherboard for both DEC Alpha or AMD Athlon.
Of course, that never happened. But people keep wishing.
As wolfgke pointed out, yeah. They claim that it was because of issues with the availability of the process they intended to manufacture on, and I'd sure like to believe that that was all it was.
One of the amazing possibilities with RISC-V will be how it democratizes chip designing and by that opens up the ability to innovate in an area of computing that so far has been reserved to a selected few.
RISC-V isn't really about price or performance – it's about innovation, agility, exploration and new frontiers.
The article didn't mention that the development board costs 1000 USD and the expansion board costs another 2000 USD, and it's only a barebone system, a full system comparable to a high-performance PC would require another 500 USD. At this price level (~3000+USD), one can almost purchase an OpenPOWER-based workstation (as we already have seen, the crowdfund campaign for Talos Secure Workstation failed due to its price, https://www.phoronix.com/scan.php?page=article&item=talos-wo...). So no, I still don't think RISC-V is as usable as a PC for an average user at its current shape as a prototype for developers.
You can download a lot of the RISC-V's source to use in FPGA's or your own hardware. Nobody has given me a link to the same for POWER9. There's also a lower risk of getting patent sued for selling RISC-V versus IBM's I.P.. I'd say POWER9 is nowhere near as open as the RISC-V offering. It's "open" like OpenVMS: using the word to get dollars more than maximizing openness.
I meant open regarding the hardware, bootloader, etc., but it seems like sifive has released more code since I last looked and you can now bring up a board without any blobs.
And yeah, we won't be seeing openpower on FPGAs anytime soon.
I have two of these boards which are part of the Fedora build system (see http://fedora.riscv.rocks/koji/). The performance is fine for light development, but they're not blazingly fast -- and we don't expect that, it's the first development board available only in small quantities. The chip itself is an in-order design, something like the A53.
If you can take one of those boards off of build duty for long enough (maybe half an hour?), it would be interesting to see the results of a UnixBench [1] run.
Using some right angle PCIe connectors for the graphics and USB expansion cards, they'd probably be able to shrink the height of that case significantly.
Now if the HiFive could be scaled uo to match the performance of a current x86 CPU, this might become a serious contender for a decent set of applications.
It doesn't need to hit the same perf as high-end x86 to be useful for a lot of uses; observe the sheer number of IoT projects run on Raspberry Pi and the like. Now, of course, I think we all would like to see high-end riscv be a thing so we can ditch x86 in that market segment too.
It's a $1000 for that HiFive board. That's a crazy amount of money for a hobby board, I could swing it if it was like $500 to 600, but that's not the case. I could build a really nice conventional desktop for a $1000 dollars.
It's not a hobby board and it's not a product. The SoC is "engineering sample", made in runs of 100 and probably costing about $300 to $400 for each one sold assuming most of them work. That's before you count the board, which also has non-cheap components. The cost of 8 GB of DDR4 2400 is all by itself several times what a Pi (with 1 GB of 900 MHz LPDDR2) retails for.
None of this matters if you're a company that wants to get into RISC-V and you're paying an engineer $10k+ a month to evaluate RISC-V and get a head start on developing your OS or application for it. The hardware cost (including expansion board) is maybe a week's salary.
It's an early-access prototype for engineers to use to develop software for the cheap products that will come in the next year or two. It's not intended for hobbyists.
I'm not referring to this specific hardware - I know this is not consumer-ready - but to RISC-V overall. If we want to sell a RISC-V-based x86/ARM replacement, it can't cost more than the well-known, multi-sourced part for the same application.
As an engineer, I care about the elegance of the underlying hardware/ISA, but when it's time to buy tech for a client, I can't afford to do that.
It came, went, and came again for ARM. On complete mainstream systems, however, the price of the CPU will be a relatively small fraction of the total BOM.
The main CPU is just one of many chips in a computer nowadays – even some cables have ARM-chips built into them to convert signals. RISC-V can probably be an even better fit there as its open design makes it a lot easier to customize it so that its tailored for such specific tasks.
I think it's coming sooner rather than later. Obviously arm has the upper hand here but windows is still exclusive to qualcomm.
The interesting bit here is that from what I've heard, RISC V could be twice as efficient as ARM. Couple that with the open source model and we could see some real shifts in computing very soon.
The Risc-V board was about $1000 the last time I checked, and the microsemi expansion thing was $2000. The SiFive board is for a small run development chip and the microsemi has a big honkin' FPGA, so the prices aren't unreasonable for that.
Out in the real world, I know of cases where proprietary CPU or DSP IP was rejected in favor of RISC-V alternatives.
RISC-V may not change everything, but I do believe that it will change on thing in a major way: the financials of CPU IP such as Tensilica, Cortex-M0, ARC etc.
There is very little friction in replacing embedded controllers that are not customer facing. And that's a market were $0.01 in licensing fees can be a big deal.
Edit: in the maker world, the so-called Blue Pill is incredibly popular. It has an STM32F103 SOC with a 72MHz Cortex M3 and tons of digital and analog interfaces. On AliExpress, these boards go for $1.60 a piece!
> There is very little friction in replacing embedded controllers that are not customer facing. And that's a market were $0.01 in licensing fees can be a big deal.
Reminds me of USB vs Firewire. Firewire was the superior of the two yet it lost. Why? USB didn't have Fw's $0.25 licensing fee per manufactured device.
Steve Jobs changed royalty model from a flat licensing fee to a $1 fee per port (insane!), Intel walked away and cancelled all FireWire development, Jobs lowered it then to $0.25 but Intel didn't come back.
I remember PC and laptops equipped with a single fireware port well into the late 2000s even though peripherals are pretty much extinct by that time. Even Apple themselves appeared to have given up by removing them from newer ipods.
It's also about friction. You can download the RISC-V design straight off github (https://github.com/freechipsproject/rocket-chip) and start using it immediately. You don't have to phone up ARM or bring in lawyers to negotiate a license.
At least ARM smartened up on that one with the Cortex M0 and M3 DesignStart license, which requires no up front fee and you can just download the code for evaluation.
Probably still a good idea to have a lawyer read things over...
FYI man, alright. You could sit at home, and do like absolutely nothing, and your name goes through like 17 computers a day. 1984? Yeah right, man. That's a typo. Orwell is here now. He's livin' large. We have no names, man. No names. We are nameless!
I'm a big fan of RISC-V but HiFive completely ruined the whole point.
I was excited for a _proper_ open ISA because it would open up super low cost hardware development. But looking at the $35 raspberry pi with a license-bound ARM ISA and a supposedly open source board for $1000 it looks like HiFive is playing by intel's or ARM's rules.
No chance for risc-v adoption with this ridiculous overpricing
> But looking at the $35 raspberry pi with a license-bound ARM ISA and a supposedly open source board for $1000 it looks like HiFive is playing by intel's or ARM's rules. No chance for risc-v adoption with this ridiculous overpricing
This is the first revision of a developer board. It is intended for die-hard open source fanatics with money and (this is the real audience) professional developers who want to port operating systems (and perhaps their software) to RISC-V. Such developer boards are always expensive. Cheaper board will become available as soon as this audience is saturated. Then a next (cheaper) revision will be put to market that targets user mode software developers. This revision will still be expensive, but already cheaper. The following revision will target adventurous tinkerers. etc.
And so it trickles down and slowly the price decreases over time. But if you want to take a bet: it will nevertheless stay much more expensive than a Raspberry Pi for a long time.
Indeed. This is a "developer board". They're made with little consequence to cost and they usually cost ghastly amounts compared to what you'd expect out of a standard motherboard.
They're for someone like Western Digital to buy for their devs to develop and test stuff against in their own designs.
The Raspberry Pi is based on an obsolete old graphics chip called Video Core IV with some ARM cores added as an afterthought. Of course it's cheap, it had a 10 year headstart and benefited from the economies of scale of the original product. And as you can figure out almost every SBC is based on old TV boxes (sometimes laptops like RK3399) because that way you can just slap the old SoC on a PCB and sell it without making a completely new SoC. The vast majority of phone SoC's simply do not have the interfaces (often just a single port for USB, network, and eMMC storage, display, perfectly designed for the phone in question) required by SBCs.
In short the production run is very small and that's why it's so expensive. ARM SBCs with custom SoCs cost around the same. Just take a look at linaro's ARM desktop [0] It's $1200 and doesn't even come with 8GB of RAM.
RISC-V has already been adopted by many companies as low and not-so-low performance embedded microcontrollers. It's just that you don't see it. And it's really perfect for that.
I think that's pretty exciting.
As for super low cost hardware development: you can add a RISC-V CPU to FPGAs with as little as, say, 1500 LUTs, which can be purchased for less than $10.
Do $5000 ARM servers kill the point of the Raspberry Pi?
The point of an open ISA is not "every product made with it is super cheap" (licensing is a tiny aspect of it), and expecting a newly developed, small-volume product to compete with something made by an established player at multiple orders of magnitude larger scale is totally unrealistic.
There's smaller, cheaper RISC-V products out there if you want something risc-v to play with. Serious adoption is going to happen at different places and not bound to "what does an HiFive dev kit cost", that's a rounding error in many places.
Many people are in for a rude awakening when they realize that a free ISA saves them like 1% or less of system cost. It certainly can't overcome the ~10x cost difference between a low-volume prototype board and a mass-produced board.
RPi also kind of ruined the hardware world because AFAIK the SoC was being dumped below cost; I'm not sure if that's still true.
Hard to imagine that the SoC is still being dumped after all of these years, if it even was in the first place.
If the purpose was to kill off the grossly overpriced PC104 market, mission accomplished. The fact that those boards have spawned a zillion competitors seems to suggest that any further dumping is not having the desired effect.
A free ISA is about more than saving a few pennies on each board in royalties, it's about having a chip you can truly trust. One that doesn't have some opaque binary blob running at ring -2. One where nothing is encrypted by a key only the manufacturer (and whomever they can strike a deal with) has. About hardware you truly own and control.
As much as I believe that RISC-V will work its up in the embedded space, I don't think many people care about the "chips you can truly trust" argument.
The moment you're talking ASIC (or even FPGA, with an opaque bitstream), it's anybody'd guess what happens whether you use a RISC-V CPU or not. Even if the known CPU is known to be untainted, a tiny, invisible, additional CPU is sufficient to take over the chip and you'd be none the wiser. The area cost of such an additional CPU would be essentially undetectable, less than 0.01mm2 on a modern process.
Unless you're talking about making your ASIC, but in that case, a commercial offering (which typically comes with a source code license) gives you just as much access to review the code for hidden firmware.
> A free ISA is about more than saving a few pennies on each board in royalties, it's about having a chip you can truly trust. One that doesn't have some opaque binary blob running at ring -2. One where nothing is encrypted by a key only the manufacturer (and whomever they can strike a deal with) has. About hardware you truly own and control.
This has basically nothing to do with the ISA. It's not the ISA that hides secrets and requires binary blobs. A chip is much more than an instruction set, hence why dealing with the proprietary undocumented garbage to bring up a new ARM SoC is a pain in the ass even if you've memorized every ARM instruction down to its encoding...
If RISC-V gets picked up and used by mainstream chipmakers in the SBC & TV BOX & mobile space, there is no doubt we will end up with chips that have proprietary undocumented garbage interfaces. Just like they also now take something like the (open source) ATF or OP-TEE, implement support for their own chip, and then publish a binary blob without source code.
The original RPi SoC was intended for DVRs and set-top-boxes and maybe as application CPU in midrange TVs. The design with huge-ish video accelerator and highly battery unfriendly power requirements is totally unappropriate for anything mobile, even less for anything designed by Nokia with their full-custom PMICs with internal ARM cores and so o on...
This gets repeated over and over but I don't get it. You could build a blob-free ARM chip. Existing RISC-V chips already have/had blobs. Freeeeedom is orthogonal to the ISA.
> Many people are in for a rude awakening when they realize that a free ISA saves them like 1% or less of system cost.
Actually nobody will have a rude awakening from that as everybody in RISC-V already knows this. That ISA don't matter much for price or performance was mentioned in pretty much every single presentation on RISC-V.
Only by open source fans who don't know much about hardware had such unrealistic expectations.
RISC-V allows for a future of open and costume hardware to be used. There will never be an open hardware RISC-V RPi style board unless you have an open ISA you can build around and use the software base.
Now we have real shot at something like that coming about.
There are lots of things that cost money in hardware design, and ISA licensing is a very small part of them.
Edit: I wonder if I should do a rather confrontational blog post telling people why Open hardware is never going to be the free lunch that open source software is..
> I wonder if I should do a rather confrontational blog post telling people why Open hardware is never going to be the free lunch that open source software is..
Bunnie Huang spoke at one of the RISC-V summits on this topic.
> There are lots of things that cost money in hardware design, and ISA licensing is a very small part of them.
Indeed - and this is exactly the point of ISA licensing (and IP blocks): to make it sufficiently cheaper to just license the ISA or IP blocks instead of developing the product from ground up.
> Right, but with RISC-V you can actually have some competition to implement RISC-V between multiple vendors, hopefully driving prices down.
I am not convinced that competition is always a good thing here: lots of competitors lead to shrinking margins. This means less money that can be invested into innovating by the respective companies.
> Open hardware is never going to be the free lunch that open source software is..
Unless we can automate the chip making process. Think of it as the chip version of PCB micromanufacture or 3D printing. At some point someone will make a business out of making boards and placing all the components for you. The trick is to do it without any retooling and no humans involved.
What is the manufacturing cost of a wafer full of, say, CPUs? If we can all get our designs in there, we can share the manufacturing cost.
> What is the manufacturing cost of a wafer full of, say, CPUs? If we can all get our designs in there, we can share the manufacturing cost.
This is called "multi project wafer" or "shuttle service" if you want to look for it.
Actual prices are pretty rare, but I happened to find some: https://nmi.org.uk/wp-content/uploads/2016/11/01-Easy-Access... ; those line up with what I've heard. $25,000 for a few chips from the MPW service, or $100k for your own mask set then $1-2k per wafer.
Give it some time to mature into a large-scale production. Comparing the cost of what's damn near a developer prototype board to Raspberry Pis manufactured in the millions is like comparing the cost of a yacht to a honda civic.
Since HiFive is to my knowledge the only ones producing such kind of silicon chips with this instruction set, it is infinitely cheaper than other options, reducing the average price by NaN. I fail to see how more supply for an open architecture raises prices.
[1] https://www.indiegogo.com/projects/sipeed-maix-the-world-fir... [2] https://www.seeedstudio.com/Sipeed-MAIX-I-module-WiFi-versio...