A ~thousand to several thousand dollar product with a market penetration of 24% (low) becomes completely free, and the market penetration shifts to 34% (still low). I think 'only' is justified.
> the costs of developing and the start-up costs have been born the rest is marginal
The NRE costs have not been 'born' until the product is EOL. They are distributed across the price of each unit. My hypothesis is that this chip has a sufficiently low volume that the NRE cost / chip is substantial.
> What you seem to forget is that once it is worth doing an ASIC that is pretty much proof that the economies of scale are there
When you have strict power requirements (i.e. need a battery life of a month), it can still make sense to go for an ASIC even with relatively low volume. Add to this an inelastic demand curve (i.e. you will sell the same number independent of price), and there isn't a compelling reason to try to do it with a DSP or FPGA.
> These chips probably cost < $2 to produce even at this quantity
If we assume that OnSemi could design this chip for $10M, then they would have to sell 5M of them to have your proposed unit cost of < $2 (assuming a wafer cost of zero, which is obviously wrong). I would guess that $10M is a lowball for the total development cost, and that 5M is way optimistic for volume (that would pretty much require this random chip is in 100% of hearing aids sold in the U.S. in the last few years). They've probably sold an order of magnitude less than that.
Maybe I'm wrong here, but it isn't as obvious to me as it apparently is to you.
A ~thousand to several thousand dollar product with a market penetration of 24% (low) becomes completely free, and the market penetration shifts to 34% (still low). I think 'only' is justified.
> the costs of developing and the start-up costs have been born the rest is marginal
The NRE costs have not been 'born' until the product is EOL. They are distributed across the price of each unit. My hypothesis is that this chip has a sufficiently low volume that the NRE cost / chip is substantial.
> What you seem to forget is that once it is worth doing an ASIC that is pretty much proof that the economies of scale are there
When you have strict power requirements (i.e. need a battery life of a month), it can still make sense to go for an ASIC even with relatively low volume. Add to this an inelastic demand curve (i.e. you will sell the same number independent of price), and there isn't a compelling reason to try to do it with a DSP or FPGA.
> These chips probably cost < $2 to produce even at this quantity
If we assume that OnSemi could design this chip for $10M, then they would have to sell 5M of them to have your proposed unit cost of < $2 (assuming a wafer cost of zero, which is obviously wrong). I would guess that $10M is a lowball for the total development cost, and that 5M is way optimistic for volume (that would pretty much require this random chip is in 100% of hearing aids sold in the U.S. in the last few years). They've probably sold an order of magnitude less than that.
Maybe I'm wrong here, but it isn't as obvious to me as it apparently is to you.