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well that sounds like tons of fun. The ring bus sounds a bit like the communication channel in some disk channel controllers where each disk would get the instruction and pass it on to the next one on the chain if it wasn't for it.

I definitely want to see if I can bring something like this up on one of the many FPGA boards I have in my junk drawer!




There is a Smalltalk derived machine by one Jecel Assumpcao that uses this architecture as well.

https://www.researchgate.net/publication/309254446_Adaptive_...


My design used a 2D mesh built from register insertion ring networks. But that is a small implementation detail - the general idea is the same.


Hah! Thank you for the correction.




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