I just learned of "dynamic reconfiguration", where a running device configures and commits additional logic units to a temporary task.
Is that possible, in principle, in a Spartan 7?
It is easy to believe that you would need to pre-generate bitstreams for each configuation, and could only swap them in verbatim, not generate them on-the-fly, but downloading from a library, perhaps with parameterized choices, could increase flexibility.
Most current FPGAs offer the option to have one configuration select a different bitstream in the configuration memory and have that replace itself. That allows a simple menu configuration to let the user select between several actual configurations. Or it allows over the air updates.
In the specific case of Xilinx FPGAs there was a feature introduced in the original Virtex called "partial configuration". This has been present in all its products for the last 20 years. It allows a design to be broken into parts such that one part may be replaced even while the rest of the FPGA continues to work normally. This is pretty hard to use and the interface between the part being swapped and the rest of the circuit is rather tricky, so it has been use more for cool demos than actual products.
It is possible to have the equivalent to this with non Xilinx FPGAs by having several smaller ones connected to each other on a board. Then dynamic reconfiguration of one can happen while the others continue to work normally.
Is that possible, in principle, in a Spartan 7?
It is easy to believe that you would need to pre-generate bitstreams for each configuation, and could only swap them in verbatim, not generate them on-the-fly, but downloading from a library, perhaps with parameterized choices, could increase flexibility.