This model of bus sharing was extremely common at the time, just splitting access to the bus on the off cycle of the bus. Commodore 64 and Atari ST were also like this, among others. I forget if the Atari 8-bit machines (also partially Jay Miner designs) were fully like this, but I believe they were.
It worked because the world then was almost the opposite of the way it is now. Back then memory & bus was as fast or faster than the CPU and so you could do this kind of thing. To the point where there were architectures where the CPU itself had basically no registers (TMS 99xx), and the processor did registers (or register-like as in the 6502 'zero page') access via SRAM.
Now memory access is many times slower than the processor, keeping things in on-die cache and in registers is key.
It worked because the world then was almost the opposite of the way it is now. Back then memory & bus was as fast or faster than the CPU and so you could do this kind of thing. To the point where there were architectures where the CPU itself had basically no registers (TMS 99xx), and the processor did registers (or register-like as in the 6502 'zero page') access via SRAM.
Now memory access is many times slower than the processor, keeping things in on-die cache and in registers is key.