I've been tempted to learn Verilog, looks like I might have a fun project to start here, trying to pipeline this. If I were writing the instruction set I'd be tempted to put all the value codes for next word or PC next to each other so it would be easier to figure out at decode state if the PC would be doing anything wonky, but that isn't a huge impediment or anything. The instruction boundary problem with regards to going super scalar looks as bad as it is in x86, but that's straying pretty far from the design goals.