I don't feel comfy using duplicate instructions for a 'R'educed instruction set.
That said, I know in some cases it could increase performance since the code would use less memory (and certainly more things which I don't know because I am not into modern advanced hardware CPU micro-architecture design).
I explicitely do disable register ABI alias names, pseudo-instructions and transparent "optimizations", because I run the RISC-V binary in my own x86_64 assembly written little RISC-V machine code interpreter which does support only the core instructions (and a linux syscall translation layer). I may start to add the compressed instructions someday though.