Freescale's documentation was fantastic. TI's was mostly good, except for whole areas they left out.
Marvell . . . hoo boy. Let's just say that everyone telling us "If you go with Marvell, you're in for a ride" was correct. Just enough detail to get you into trouble. Cheap, though. . . . :-)
Yeah thankfully I never got that far with Marvell. We had their eval platform while also looking at the iMX (well, we just bought a Nitrogen from Boundary. Much easier).
The Marvell platform was just a trainwreck. Even simple questions were met with blank stares.
We had to talk to the actual chip designers to get questions answered. After weeks of asking stuff that just got echo-chambered back.
Us: "We want to know the delay period between freezing the timer and reading it. The documentation says 'three clocks', but we have strong evidence this is not accurate."
Marvell: "We are happy to help with your question. You need to wait three clock cycles."
Us: "That doesn't work. (insert mountain of evidence here)."
Marvell: "Let us get back to you."
(much later)
Us: "Remember that question about the clock register?"
Marvell: "What question?"
(repeat above, several times)
Much later, we get a phone session together.
Obviously new Marvell chip designer: "It says three clock cycles here."
Us: (lots more evidence that that is not the case)
Slightly terrified (but still new) Marvell chip designer: "Let us get back to you."
(much, much later ...)
Marvell Chip designer, who clearly has his act together, but designed the circuit four years ago and can't remember, so he digs into the design files: "Oh yeah. Three clocks, but they're internal, so you can't see them. Use this clock over /here/ and write this, then read that, and you should be good."
Repeat for each major chip feature, and don't get me started on DRAM controllers or USB PHY registers.
Marvell . . . hoo boy. Let's just say that everyone telling us "If you go with Marvell, you're in for a ride" was correct. Just enough detail to get you into trouble. Cheap, though. . . . :-)